   1              		.syntax unified
   2              		.cpu cortex-m3
   3              		.fpu softvfp
   4              		.eabi_attribute 20, 1
   5              		.eabi_attribute 21, 1
   6              		.eabi_attribute 23, 3
   7              		.eabi_attribute 24, 1
   8              		.eabi_attribute 25, 1
   9              		.eabi_attribute 26, 1
  10              		.eabi_attribute 30, 4
  11              		.eabi_attribute 34, 1
  12              		.eabi_attribute 18, 4
  13              		.thumb
  14              		.syntax unified
  15              		.file	"uart0_irq.c"
  16              		.text
  17              	.Ltext0:
  18              		.cfi_sections	.debug_frame
  19              		.global	__aeabi_i2d
  20              		.global	__aeabi_dmul
  21              		.global	__aeabi_d2iz
  22              		.global	__aeabi_i2f
  23              		.global	__aeabi_fdiv
  24              		.global	__aeabi_fadd
  25              		.global	__aeabi_fmul
  26              		.global	__aeabi_f2d
  27              		.global	__aeabi_ddiv
  28              		.section	.text.uart0_SetBaudrate,"ax",%progbits
  29              		.align	1
  30              		.global	uart0_SetBaudrate
  31              		.thumb
  32              		.thumb_func
  34              	uart0_SetBaudrate:
  35              	.LFB3:
  36              		.file 1 "uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c"
   1:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** /*
   2:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	ESTA BIBLIOTECA NÃO TRATA OS ERROS DE RECEPÇÃO PE, OE, FE E BI NAS INTERRUPÇÕES
   3:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	Logo as interrupções rx line (U0IER_ELSI) e as interrupções responsável pelo modem estão desativad
   4:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	
   5:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	1 - SE NÃO USARMOS CONRTROLE DE FLUXO devemos levar em consideração o estouro da buffer
   6:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 		de recepção para onde o ARM está trasmitindo
   7:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 		se transmitirmos muitos dados em um baudrate elevado, o buffer do destino pode estourar e
   8:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 		pode aperece que o problema seja nas nossas bibliotecas. então
   9:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 		aumente o buffer rx do destino, ou aumente a prioridade de recepção
  10:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 		ou diminuia o baudrate em uma taxa mais adequada
  11:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
  12:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	A interrupção de transmissão é gerada a cada 16 bytes transmitidos, ou seja, quando a FIFO TX esti
  13:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	A interrupção de recepção é gerada, na pior das hipóteses, a cada byte recebido; isto porque podem
  14:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	o nível da FIFO RX (trigger) para que a interrupção seja gerada.
  15:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
  16:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	Como a UART não é tão rápida assim e não há tanto fluxo de dados pela UART, as interrupções não sã
  17:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	subsequentemente dando tempo de sobra para outras funções da CPU.
  18:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** */
  19:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
  20:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** #include "uart0_irq.h"
  21:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** #include "vic.h"	
  22:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** #if defined(cortexm3)
  23:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** #include "arm.h"
  24:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** #endif
  25:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
  26:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** static volatile u8 u0_tx_running;						// Indicador se existe dados sendo transmitidos na UART
  27:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** static volatile u16 u0_overflow_rx;						// Contador de estouro do buffer de recepção
  28:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	
  29:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // BUFFERS DE RECEPÇÃO E TRANSMISSÃO
  30:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** static volatile buffer_t u0_buf_rx; 					// Cria uma estrutura do buffer de recepção
  31:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** static volatile buffer_t u0_buf_tx;						// Cria uma estrutura do buffer de transmissão
  32:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	
  33:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** #if (USE_MALLOC == pdON)
  34:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	static u8 *u0_data_rx;								// Ponteiro para alocação de memória para o buffer de recepção
  35:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	static u8 *u0_data_tx;								// Ponteiro para alocação de memória para o buffer de transmissão
  36:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** #else
  37:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	static u8 u0_data_rx[UART0_RX_BUFFER_SIZE];			// Alocação de memória automática para o buffer de r
  38:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	static u8 u0_data_tx[UART0_TX_BUFFER_SIZE];			// Alocação de memória automática para o buffer de t
  39:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** #endif
  40:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
  41:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** void uart0_ISR (void);
  42:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
  43:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //#################################################################################################
  44:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // UART CONFIGURAÇÔES
  45:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //#################################################################################################
  46:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //#################################################################################################
  47:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
  48:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // ------------------------------------------------------------------------------------------------
  49:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Descrição: 	Incializa e configura o modo de trabalho da UART
  50:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Parametros:	baudrate: 
  51:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //					1200, 2400, ... , 57600, 115200 ...
  52:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Retorna:		retorna pdPASS se iniciliazou sem problemas ou retorna código do erro
  53:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // ------------------------------------------------------------------------------------------------
  54:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** int uart0_Init(u32 baudrate) {
  55:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	PCONP |= PCUART0;											// Ligar a uart no controle de potencia. Tem que ser antes da config
  56:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	
  57:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	#if defined(arm7tdmi)
  58:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	U0_PINSEL = (U0_PINSEL & ~U0_PINMASK) | U0_PINS;			// Configura os pinos do uC para a função UAR
  59:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	#endif //arm7tdmi
  60:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
  61:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	#if defined(cortexm3)
  62:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	uart0_ConfigPort();
  63:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	#endif
  64:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
  65:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	#if (UART0_USE_HANDSHAKING == pdON)
  66:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	// Por padrão esses pinos já são GPIO
  67:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	U0_CTS_DIR &= ~U0_CTS; 				// Pino CTS como entrada
  68:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	U0_RTS_DIR |= U0_RTS; 				// Pino RTS como saída
  69:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	uart0_RTSon(); 						// Sinaliza que posso receber dados
  70:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	#endif
  71:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
  72:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	U0IER = 0;   	                      						// Desabilita todas as fonte de interrupções da uart
  73:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	U0IIR;                                						// Limpa os identificadores de pendencia interrupçõe
  74:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	U0FCR = (U0FCR_TX_FIFO_RESET | U0FCR_RX_FIFO_RESET);		// Limpa TX e RX FIFOS
  75:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	
  76:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	uart0_SetBaudrate(baudrate);
  77:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
  78:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	U0FCR = UART0_FIFOMODE;										// Configura o modo de trabalho da FIFO
  79:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	
  80:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	U0RBR;                                						// Limpa o registrador de recepçao de dados
  81:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	U0LSR;                                						// Limpa o registrador de estado de linha
  82:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	U0FCR = U0FCR_RX_FIFO_RESET;								// Limpa a FIFO de recepção
  83:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	U0FCR = U0FCR_TX_FIFO_RESET;          						// Limpa a FIFO de transmissão
  84:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	
  85:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	#if defined(arm7tdmi)
  86:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	if (!irq_Install(VIC_UART0, uart0_ISR, UART0_PRIO_LEVEL))
  87:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 		return errIRQ_INSTALL;
  88:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	#endif
  89:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
  90:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	#if defined (cortexm3)
  91:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	nvic_enableIRQ(VIC_UART0);
  92:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	nvic_setPriority(VIC_UART0, UART0_PRIO_LEVEL);
  93:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	#endif
  94:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
  95:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	// INICIALIZO OS BUFFERS DE RECEPÇÃO E TRANSMISSÃO
  96:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	#if (USE_MALLOC == pdON)
  97:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	u0_data_rx = malloc(UART0_RX_BUFFER_SIZE*sizeof(u8));
  98:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	u0_data_tx = malloc(UART0_TX_BUFFER_SIZE*sizeof(u8));
  99:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	#endif
 100:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 101:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	buffer_Init(&u0_buf_rx, u0_data_rx, UART0_RX_BUFFER_SIZE);
 102:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	buffer_Init(&u0_buf_tx, u0_data_tx, UART0_TX_BUFFER_SIZE);
 103:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 		
 104:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	u0_overflow_rx = 0; 										// Limpa overflow do buffer de recepção
 105:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	u0_tx_running = pdFALSE;
 106:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	
 107:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	U0IER |= U0IER_ERBFI;										// Habilita interrupção de dados prontos na recepção e CTI (SIMULAD
 108:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	U0IER &= ~U0IER_ETBEI;                						// Desabilita a interrupção de buffer vazio de transmi
 109:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 110:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	return pdPASS;
 111:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** }
 112:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 113:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** #if (defined(cortexm3) && (UART0_USE_BAUDRATE_TUNE == pdON) )
 114:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //a rotina tenta encontrar a melhor combinação
 115:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //indiferente da frequência e do baud
 116:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //	detremina o valor dos registradores "DLM/DLL"
 117:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //	aqui forçamos o baud a ficar mais veloz do que o valor
 118:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //	desejado para que o ajuste através do FDR seja mais preciso
 119:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** static int uart_dlm(int baud) {
 120:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	return (int)(((PCLK / 16) / baud) * 0.8);
 121:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** }
 122:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 123:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //brief
 124:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //	o registrador FDR permite apenas "reduzir" o baud rate, por isso
 125:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //	ao calcular DLM devemos usar um baud mais veloz
 126:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //params
 127:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //	<baud> desired baud rate
 128:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //obs
 129:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //	1<=M<=15
 130:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //	0<=D<=14
 131:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //	D<M
 132:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //	fraction = BAUD*(1+D/M)
 133:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** #include <stdlib.h>
 134:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** static int uart_fdr(int baud) {
 135:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	int d, m, b, e, r;
 136:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	float f;
 137:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	r = 1<<4; //apenas o MULVAL por default
 138:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	e = baud;
 139:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	for(m=1;m<=15;m++) {
 140:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 		for (d=0;d<m;d++) {
 141:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 			f = 1.0 + (float)d/(float)m;
 142:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 			//calcula o baud truncado
 143:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 			b = uart_dlm(baud);
 144:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 			//agora o valor final corrigido
 145:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 			b = (int)(PCLK/(b*f*16.0));
 146:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 			//erro ficou menor?
 147:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 			if (abs(baud-b)<e) {
 148:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 				e = abs(baud-b);
 149:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 				r = (m<<4) + d;
 150:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 			}
 151:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 		}
 152:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	}
 153:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	return r;
 154:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** }
 155:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 156:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** void uart0_SetBaudrate(u32 baudrate) {
  37              		.loc 1 156 0
  38              		.cfi_startproc
  39              		@ args = 0, pretend = 0, frame = 8
  40              		@ frame_needed = 0, uses_anonymous_args = 0
  41              	.LVL0:
  42 0000 2DE9F74F 		push	{r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
  43              	.LCFI0:
  44              		.cfi_def_cfa_offset 48
  45              		.cfi_offset 4, -36
  46              		.cfi_offset 5, -32
  47              		.cfi_offset 6, -28
  48              		.cfi_offset 7, -24
  49              		.cfi_offset 8, -20
  50              		.cfi_offset 9, -16
  51              		.cfi_offset 10, -12
  52              		.cfi_offset 11, -8
  53              		.cfi_offset 14, -4
  54              		.loc 1 156 0
  55 0004 8046     		mov	r8, r0
 157:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	U0LCR = U1LCR_DLAB_ENABLE;             						// Seleciona os latches de devisões para ajusta do 
  56              		.loc 1 157 0
  57 0006 344E     		ldr	r6, .L8+16
  58              	.LBB8:
  59              	.LBB9:
 120:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** }
  60              		.loc 1 120 0
  61 0008 3448     		ldr	r0, .L8+20
  62              	.LVL1:
  63              	.LBE9:
  64              	.LBE8:
  65              		.loc 1 157 0
  66 000a 8023     		movs	r3, #128
  67 000c 3360     		str	r3, [r6]
  68              	.LVL2:
  69              	.LBB12:
  70              	.LBB10:
 120:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** }
  71              		.loc 1 120 0
  72 000e 90FBF8F0 		sdiv	r0, r0, r8
  73 0012 FFF7FEFF 		bl	__aeabi_i2d
  74              	.LVL3:
  75 0016 2CA3     		adr	r3, .L8
  76 0018 D3E90023 		ldrd	r2, [r3]
  77 001c FFF7FEFF 		bl	__aeabi_dmul
  78              	.LVL4:
  79 0020 FFF7FEFF 		bl	__aeabi_d2iz
  80              	.LVL5:
  81              	.LBE10:
  82              	.LBE12:
  83              	.LBB13:
  84              	.LBB14:
 138:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	for(m=1;m<=15;m++) {
  85              		.loc 1 138 0
  86 0024 C246     		mov	r10, r8
  87              	.LBE14:
  88              	.LBE13:
  89              	.LBB16:
  90              	.LBB11:
 120:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** }
  91              		.loc 1 120 0
  92 0026 0746     		mov	r7, r0
  93              	.LVL6:
  94              	.LBE11:
  95              	.LBE16:
 158:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	u32 f_div = uart_dlm(baudrate);
 159:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 160:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	U0DLL = f_div%256;        								// Ajusta o baudrate byte baixo
  96              		.loc 1 160 0
  97 0028 2D4B     		ldr	r3, .L8+24
  98 002a C2B2     		uxtb	r2, r0
  99 002c 1A60     		str	r2, [r3]
 161:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	U0DLM = f_div/256;    									// Ajusta o baudrate byte alto
 100              		.loc 1 161 0
 101 002e 020A     		lsrs	r2, r0, #8
 102 0030 5A60     		str	r2, [r3, #4]
 103              	.LVL7:
 104              	.LBB17:
 105              	.LBB15:
 137:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	e = baud;
 106              		.loc 1 137 0
 107 0032 4FF01009 		mov	r9, #16
 139:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 		for (d=0;d<m;d++) {
 108              		.loc 1 139 0
 109 0036 0124     		movs	r4, #1
 110              	.LVL8:
 111              	.L2:
 149:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 			}
 112              		.loc 1 149 0
 113 0038 4FEA041B 		lsl	fp, r4, #4
 114 003c 0025     		movs	r5, #0
 115              	.LVL9:
 116              	.L4:
 147:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 				e = abs(baud-b);
 117              		.loc 1 147 0
 118 003e 2846     		mov	r0, r5
 119 0040 FFF7FEFF 		bl	__aeabi_i2f
 120              	.LVL10:
 121 0044 0190     		str	r0, [sp, #4]
 122 0046 2046     		mov	r0, r4
 123 0048 FFF7FEFF 		bl	__aeabi_i2f
 124              	.LVL11:
 125 004c 019B     		ldr	r3, [sp, #4]
 126 004e 0146     		mov	r1, r0
 127 0050 1846     		mov	r0, r3
 128 0052 FFF7FEFF 		bl	__aeabi_fdiv
 129              	.LVL12:
 130 0056 4FF07E51 		mov	r1, #1065353216
 131 005a FFF7FEFF 		bl	__aeabi_fadd
 132              	.LVL13:
 133 005e 0190     		str	r0, [sp, #4]
 134 0060 3846     		mov	r0, r7
 135 0062 FFF7FEFF 		bl	__aeabi_i2f
 136              	.LVL14:
 137 0066 019B     		ldr	r3, [sp, #4]
 138 0068 0146     		mov	r1, r0
 139 006a 1846     		mov	r0, r3
 140 006c FFF7FEFF 		bl	__aeabi_fmul
 141              	.LVL15:
 142 0070 FFF7FEFF 		bl	__aeabi_f2d
 143              	.LVL16:
 144 0074 0022     		movs	r2, #0
 145 0076 1B4B     		ldr	r3, .L8+28
 146 0078 FFF7FEFF 		bl	__aeabi_dmul
 147              	.LVL17:
 148 007c 0246     		mov	r2, r0
 149 007e 0B46     		mov	r3, r1
 150 0080 13A1     		adr	r1, .L8+8
 151 0082 D1E90001 		ldrd	r0, [r1]
 152 0086 FFF7FEFF 		bl	__aeabi_ddiv
 153              	.LVL18:
 154 008a FFF7FEFF 		bl	__aeabi_d2iz
 155              	.LVL19:
 156 008e C0EB0800 		rsb	r0, r0, r8
 157 0092 0028     		cmp	r0, #0
 158 0094 B8BF     		it	lt
 159 0096 4042     		rsblt	r0, r0, #0
 160 0098 5045     		cmp	r0, r10
 161              	.LVL20:
 162 009a B8BF     		it	lt
 163 009c 05EB0B09 		addlt	r9, r5, fp
 164              	.LVL21:
 140:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 			f = 1.0 + (float)d/(float)m;
 165              		.loc 1 140 0
 166 00a0 05F10105 		add	r5, r5, #1
 167              	.LVL22:
 147:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 				e = abs(baud-b);
 168              		.loc 1 147 0
 169 00a4 B8BF     		it	lt
 170 00a6 8246     		movlt	r10, r0
 171              	.LVL23:
 140:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 			f = 1.0 + (float)d/(float)m;
 172              		.loc 1 140 0
 173 00a8 AC42     		cmp	r4, r5
 174 00aa C8D1     		bne	.L4
 139:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 		for (d=0;d<m;d++) {
 175              		.loc 1 139 0
 176 00ac 0134     		adds	r4, r4, #1
 177              	.LVL24:
 178 00ae 102C     		cmp	r4, #16
 179 00b0 C2D1     		bne	.L2
 180              	.LVL25:
 181              	.LBE15:
 182              	.LBE17:
 162:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	U0FDR = uart_fdr(baudrate);
 183              		.loc 1 162 0
 184 00b2 0D4B     		ldr	r3, .L8+32
 185 00b4 C3F80090 		str	r9, [r3]
 163:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	U0LCR = (UART0_MODE & ~U0LCR_DLAB_ENABLE);					// Configura o modo de trabalho da uart e desativa 
 186              		.loc 1 163 0
 187 00b8 0323     		movs	r3, #3
 188 00ba 3360     		str	r3, [r6]
 164:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** }
 189              		.loc 1 164 0
 190 00bc 03B0     		add	sp, sp, #12
 191              	.LCFI1:
 192              		.cfi_def_cfa_offset 36
 193              		@ sp needed
 194 00be BDE8F08F 		pop	{r4, r5, r6, r7, r8, r9, r10, fp, pc}
 195              	.LVL26:
 196              	.L9:
 197 00c2 00BFAFF3 		.align	3
 197      0080
 198              	.L8:
 199 00c8 9A999999 		.word	-1717986918
 200 00cc 9999E93F 		.word	1072273817
 201 00d0 00000000 		.word	0
 202 00d4 84D77741 		.word	1098372996
 203 00d8 0CC00040 		.word	1073790988
 204 00dc 84D71700 		.word	1562500
 205 00e0 00C00040 		.word	1073790976
 206 00e4 00003040 		.word	1076887552
 207 00e8 28C00040 		.word	1073791016
 208              		.cfi_endproc
 209              	.LFE3:
 211              		.section	.text.uart0_Init,"ax",%progbits
 212              		.align	1
 213              		.global	uart0_Init
 214              		.thumb
 215              		.thumb_func
 217              	uart0_Init:
 218              	.LFB0:
  54:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	PCONP |= PCUART0;											// Ligar a uart no controle de potencia. Tem que ser antes da config
 219              		.loc 1 54 0
 220              		.cfi_startproc
 221              		@ args = 0, pretend = 0, frame = 0
 222              		@ frame_needed = 0, uses_anonymous_args = 0
 223              	.LVL27:
  55:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	
 224              		.loc 1 55 0
 225 0000 1D4A     		ldr	r2, .L11
  54:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	PCONP |= PCUART0;											// Ligar a uart no controle de potencia. Tem que ser antes da config
 226              		.loc 1 54 0
 227 0002 F8B5     		push	{r3, r4, r5, r6, r7, lr}
 228              	.LCFI2:
 229              		.cfi_def_cfa_offset 24
 230              		.cfi_offset 3, -24
 231              		.cfi_offset 4, -20
 232              		.cfi_offset 5, -16
 233              		.cfi_offset 6, -12
 234              		.cfi_offset 7, -8
 235              		.cfi_offset 14, -4
  55:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	
 236              		.loc 1 55 0
 237 0004 1368     		ldr	r3, [r2]
  72:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	U0IIR;                                						// Limpa os identificadores de pendencia interrupçõe
 238              		.loc 1 72 0
 239 0006 1D4C     		ldr	r4, .L11+4
  55:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	
 240              		.loc 1 55 0
 241 0008 43F00803 		orr	r3, r3, #8
 242 000c 1360     		str	r3, [r2]
  62:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	#endif
 243              		.loc 1 62 0
 244 000e 1C4A     		ldr	r2, .L11+8
  73:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	U0FCR = (U0FCR_TX_FIFO_RESET | U0FCR_RX_FIFO_RESET);		// Limpa TX e RX FIFOS
 245              		.loc 1 73 0
 246 0010 1C4D     		ldr	r5, .L11+12
  62:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	#endif
 247              		.loc 1 62 0
 248 0012 1368     		ldr	r3, [r2]
  72:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	U0IIR;                                						// Limpa os identificadores de pendencia interrupçõe
 249              		.loc 1 72 0
 250 0014 0026     		movs	r6, #0
  62:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	#endif
 251              		.loc 1 62 0
 252 0016 43F05003 		orr	r3, r3, #80
 253 001a 1360     		str	r3, [r2]
  72:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	U0IIR;                                						// Limpa os identificadores de pendencia interrupçõe
 254              		.loc 1 72 0
 255 001c 2660     		str	r6, [r4]
  73:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	U0FCR = (U0FCR_TX_FIFO_RESET | U0FCR_RX_FIFO_RESET);		// Limpa TX e RX FIFOS
 256              		.loc 1 73 0
 257 001e 2B68     		ldr	r3, [r5]
  74:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	
 258              		.loc 1 74 0
 259 0020 0623     		movs	r3, #6
 260 0022 2B60     		str	r3, [r5]
  76:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 261              		.loc 1 76 0
 262 0024 FFF7FEFF 		bl	uart0_SetBaudrate
 263              	.LVL28:
  78:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	
 264              		.loc 1 78 0
 265 0028 0127     		movs	r7, #1
  80:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	U0LSR;                                						// Limpa o registrador de estado de linha
 266              		.loc 1 80 0
 267 002a 174B     		ldr	r3, .L11+16
  78:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	
 268              		.loc 1 78 0
 269 002c 2F60     		str	r7, [r5]
  80:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	U0LSR;                                						// Limpa o registrador de estado de linha
 270              		.loc 1 80 0
 271 002e 1B68     		ldr	r3, [r3]
  81:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	U0FCR = U0FCR_RX_FIFO_RESET;								// Limpa a FIFO de recepção
 272              		.loc 1 81 0
 273 0030 164B     		ldr	r3, .L11+20
  91:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	nvic_setPriority(VIC_UART0, UART0_PRIO_LEVEL);
 274              		.loc 1 91 0
 275 0032 0520     		movs	r0, #5
  81:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	U0FCR = U0FCR_RX_FIFO_RESET;								// Limpa a FIFO de recepção
 276              		.loc 1 81 0
 277 0034 1B68     		ldr	r3, [r3]
  82:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	U0FCR = U0FCR_TX_FIFO_RESET;          						// Limpa a FIFO de transmissão
 278              		.loc 1 82 0
 279 0036 0223     		movs	r3, #2
 280 0038 2B60     		str	r3, [r5]
  83:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	
 281              		.loc 1 83 0
 282 003a 0423     		movs	r3, #4
 283 003c 2B60     		str	r3, [r5]
  91:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	nvic_setPriority(VIC_UART0, UART0_PRIO_LEVEL);
 284              		.loc 1 91 0
 285 003e FFF7FEFF 		bl	nvic_enableIRQ
 286              	.LVL29:
  92:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	#endif
 287              		.loc 1 92 0
 288 0042 0321     		movs	r1, #3
 289 0044 0520     		movs	r0, #5
 290 0046 FFF7FEFF 		bl	nvic_setPriority
 291              	.LVL30:
 101:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	buffer_Init(&u0_buf_tx, u0_data_tx, UART0_TX_BUFFER_SIZE);
 292              		.loc 1 101 0
 293 004a 9622     		movs	r2, #150
 294 004c 1049     		ldr	r1, .L11+24
 295 004e 1148     		ldr	r0, .L11+28
 296 0050 FFF7FEFF 		bl	buffer_Init
 297              	.LVL31:
 102:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 		
 298              		.loc 1 102 0
 299 0054 9622     		movs	r2, #150
 300 0056 1049     		ldr	r1, .L11+32
 301 0058 1048     		ldr	r0, .L11+36
 302 005a FFF7FEFF 		bl	buffer_Init
 303              	.LVL32:
 104:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	u0_tx_running = pdFALSE;
 304              		.loc 1 104 0
 305 005e 104B     		ldr	r3, .L11+40
 111:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 306              		.loc 1 111 0
 307 0060 3846     		mov	r0, r7
 104:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	u0_tx_running = pdFALSE;
 308              		.loc 1 104 0
 309 0062 1E80     		strh	r6, [r3]	@ movhi
 105:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	
 310              		.loc 1 105 0
 311 0064 0F4B     		ldr	r3, .L11+44
 312 0066 1E70     		strb	r6, [r3]
 107:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	U0IER &= ~U0IER_ETBEI;                						// Desabilita a interrupção de buffer vazio de transmi
 313              		.loc 1 107 0
 314 0068 2368     		ldr	r3, [r4]
 315 006a 3B43     		orrs	r3, r3, r7
 316 006c 2360     		str	r3, [r4]
 108:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 317              		.loc 1 108 0
 318 006e 2368     		ldr	r3, [r4]
 319 0070 23F00203 		bic	r3, r3, #2
 320 0074 2360     		str	r3, [r4]
 111:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 321              		.loc 1 111 0
 322 0076 F8BD     		pop	{r3, r4, r5, r6, r7, pc}
 323              	.L12:
 324              		.align	2
 325              	.L11:
 326 0078 C4C00F40 		.word	1074774212
 327 007c 04C00040 		.word	1073790980
 328 0080 00C00240 		.word	1073922048
 329 0084 08C00040 		.word	1073790984
 330 0088 00C00040 		.word	1073790976
 331 008c 14C00040 		.word	1073790996
 332 0090 00000000 		.word	.LANCHOR0
 333 0094 00000000 		.word	.LANCHOR1
 334 0098 00000000 		.word	.LANCHOR2
 335 009c 00000000 		.word	.LANCHOR3
 336 00a0 00000000 		.word	.LANCHOR4
 337 00a4 00000000 		.word	.LANCHOR5
 338              		.cfi_endproc
 339              	.LFE0:
 341              		.section	.text.uart0_GetChar,"ax",%progbits
 342              		.align	1
 343              		.global	uart0_GetChar
 344              		.thumb
 345              		.thumb_func
 347              	uart0_GetChar:
 348              	.LFB4:
 165:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** #else
 166:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** void uart0_SetBaudrate(u32 baudrate) {
 167:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	u32 f_div;
 168:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	U0LCR = U0LCR_DLAB_ENABLE;             						// Seleciona os latches de devisões para ajusta do 
 169:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	f_div = ( PCLK / 16 ) / baudrate ;							// Calcular divisor para o baudrate
 170:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	U0DLL = f_div%256; 	    	   								// Ajusta o baudrate byte baixo
 171:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	U0DLM = f_div/256;  	  									// Ajusta o baudrate byte alto
 172:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	#if defined(cortexm3)
 173:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	U0FDR = 0x10;												// Sem ajuste fino no baudrate
 174:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	#endif
 175:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	U0LCR = (UART0_MODE & ~U0LCR_DLAB_ENABLE);					// Configura o modo de trabalho da uart e desativ
 176:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** }
 177:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** #endif
 178:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 179:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //#################################################################################################
 180:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // UART RECEPÇÂO
 181:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //#################################################################################################
 182:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //#################################################################################################
 183:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 184:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // ------------------------------------------------------------------------------------------------
 185:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Descrição:	Captura o próximo byte recebido na UART
 186:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Parametros: 	Ponteiro para da variavel char para o retorno do byte recebido
 187:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Retorna:		pdPASS indicando que existe caractere recebido ou o código do erro
 188:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // ------------------------------------------------------------------------------------------------
 189:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** int uart0_GetChar(u8 *ch) {
 349              		.loc 1 189 0
 350              		.cfi_startproc
 351              		@ args = 0, pretend = 0, frame = 0
 352              		@ frame_needed = 0, uses_anonymous_args = 0
 353              	.LVL33:
 354 0000 38B5     		push	{r3, r4, r5, lr}
 355              	.LCFI3:
 356              		.cfi_def_cfa_offset 16
 357              		.cfi_offset 3, -16
 358              		.cfi_offset 4, -12
 359              		.cfi_offset 5, -8
 360              		.cfi_offset 14, -4
 361              		.loc 1 189 0
 362 0002 0546     		mov	r5, r0
 190:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	int ret;
 191:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 192:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	if ( u0_buf_rx.size == 0 )								// Checa se o buffer de recepção ainda não foi criado
 363              		.loc 1 192 0
 364 0004 0D48     		ldr	r0, .L17
 365              	.LVL34:
 366 0006 8388     		ldrh	r3, [r0, #4]
 367 0008 9BB2     		uxth	r3, r3
 368 000a 8BB1     		cbz	r3, .L15
 193:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****    		return errBUFFER_NO_EXIST;            				// Retorna indicando erro
 194:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 195:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	if ( u0_buf_rx.datalength ) {							// Checo de o buffer de recepção contêm dados recebidos pela U
 369              		.loc 1 195 0
 370 000c C388     		ldrh	r3, [r0, #6]
 371 000e 9BB2     		uxth	r3, r3
 372 0010 8BB1     		cbz	r3, .L16
 196:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 		U0IER &= ~U0IER_ERBFI;								// Desabilita interrupção de dados prontos na recepção e CTI (SIMUL
 373              		.loc 1 196 0
 374 0012 0B4C     		ldr	r4, .L17+4
 375 0014 2368     		ldr	r3, [r4]
 376 0016 23F00103 		bic	r3, r3, #1
 377 001a 2360     		str	r3, [r4]
 197:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 		nop();
 378              		.loc 1 197 0
 379              		.syntax unified
 380              	@ 197 "uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c" 1
 381 001c 00BF     		nop
 382              	@ 0 "" 2
 198:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 		*ch = buffer_GetFromFront(&u0_buf_rx);				// Captura os dados do inicio do buffer
 383              		.loc 1 198 0
 384              		.thumb
 385              		.syntax unified
 386 001e FFF7FEFF 		bl	buffer_GetFromFront
 387              	.LVL35:
 388 0022 2870     		strb	r0, [r5]
 199:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 		U0IER |= U0IER_ERBFI;								// Habilita interrupção de dados prontos na recepção e CTI (SIMULADO
 389              		.loc 1 199 0
 390 0024 2368     		ldr	r3, [r4]
 200:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 		ret = pdPASS;
 391              		.loc 1 200 0
 392 0026 0120     		movs	r0, #1
 199:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 		U0IER |= U0IER_ERBFI;								// Habilita interrupção de dados prontos na recepção e CTI (SIMULADO
 393              		.loc 1 199 0
 394 0028 43F00103 		orr	r3, r3, #1
 395 002c 2360     		str	r3, [r4]
 396              	.LVL36:
 397 002e 38BD     		pop	{r3, r4, r5, pc}
 398              	.LVL37:
 399              	.L15:
 193:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 400              		.loc 1 193 0
 401 0030 6FF00B00 		mvn	r0, #11
 402 0034 38BD     		pop	{r3, r4, r5, pc}
 403              	.LVL38:
 404              	.L16:
 201:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	} else
 202:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 		ret = errBUFFER_EMPTY;
 405              		.loc 1 202 0
 406 0036 6FF00A00 		mvn	r0, #10
 203:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 204:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	return ret;
 205:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** }
 407              		.loc 1 205 0
 408 003a 38BD     		pop	{r3, r4, r5, pc}
 409              	.LVL39:
 410              	.L18:
 411              		.align	2
 412              	.L17:
 413 003c 00000000 		.word	.LANCHOR1
 414 0040 04C00040 		.word	1073790980
 415              		.cfi_endproc
 416              	.LFE4:
 418              		.section	.text.uart0_ClearBufferRx,"ax",%progbits
 419              		.align	1
 420              		.global	uart0_ClearBufferRx
 421              		.thumb
 422              		.thumb_func
 424              	uart0_ClearBufferRx:
 425              	.LFB5:
 206:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 207:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 208:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // ------------------------------------------------------------------------------------------------
 209:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Descrição: 	Limpa o buffer e FIFO de recepção
 210:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Parametros:	Nenhum
 211:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Retorna:		Nada
 212:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // ------------------------------------------------------------------------------------------------
 213:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** void uart0_ClearBufferRx(void) {
 426              		.loc 1 213 0
 427              		.cfi_startproc
 428              		@ args = 0, pretend = 0, frame = 0
 429              		@ frame_needed = 0, uses_anonymous_args = 0
 430 0000 10B5     		push	{r4, lr}
 431              	.LCFI4:
 432              		.cfi_def_cfa_offset 8
 433              		.cfi_offset 4, -8
 434              		.cfi_offset 14, -4
 214:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	U0IER &= ~U0IER_ERBFI;				// Desabilita interrupção de dados prontos na recepção e CTI (SIMULADOR 
 435              		.loc 1 214 0
 436 0002 0A4C     		ldr	r4, .L20
 437 0004 2368     		ldr	r3, [r4]
 438 0006 23F00103 		bic	r3, r3, #1
 439 000a 2360     		str	r3, [r4]
 215:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	nop();
 440              		.loc 1 215 0
 441              		.syntax unified
 442              	@ 215 "uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c" 1
 443 000c 00BF     		nop
 444              	@ 0 "" 2
 216:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	u0_overflow_rx = 0; 				// Limpa overflow do buffer de recepção
 445              		.loc 1 216 0
 446              		.thumb
 447              		.syntax unified
 448 000e 084B     		ldr	r3, .L20+4
 449 0010 0022     		movs	r2, #0
 450 0012 1A80     		strh	r2, [r3]	@ movhi
 217:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	U0FCR = U0FCR_RX_FIFO_RESET;		// Limpa RX FIFO
 451              		.loc 1 217 0
 452 0014 074B     		ldr	r3, .L20+8
 453 0016 0222     		movs	r2, #2
 454 0018 1A60     		str	r2, [r3]
 218:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	buffer_Clear(&u0_buf_rx);			// Limpa o buffer de recepção
 455              		.loc 1 218 0
 456 001a 0748     		ldr	r0, .L20+12
 457 001c FFF7FEFF 		bl	buffer_Clear
 458              	.LVL40:
 219:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	U0IER |= U0IER_ERBFI;				// Habilita interrupção de dados prontos na recepção e CTI (SIMULADOR PRO
 459              		.loc 1 219 0
 460 0020 2368     		ldr	r3, [r4]
 461 0022 43F00103 		orr	r3, r3, #1
 462 0026 2360     		str	r3, [r4]
 463 0028 10BD     		pop	{r4, pc}
 464              	.L21:
 465 002a 00BF     		.align	2
 466              	.L20:
 467 002c 04C00040 		.word	1073790980
 468 0030 00000000 		.word	.LANCHOR4
 469 0034 08C00040 		.word	1073790984
 470 0038 00000000 		.word	.LANCHOR1
 471              		.cfi_endproc
 472              	.LFE5:
 474              		.section	.text.uart0_CountRxOverflow,"ax",%progbits
 475              		.align	1
 476              		.global	uart0_CountRxOverflow
 477              		.thumb
 478              		.thumb_func
 480              	uart0_CountRxOverflow:
 481              	.LFB6:
 220:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** }
 221:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 222:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // ------------------------------------------------------------------------------------------------
 223:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Descrição: 	Retorna a quantidade de bytes do estouro do buffer de recepção
 224:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Parametros:	Nenhum
 225:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Retorna:		Nada
 226:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // ------------------------------------------------------------------------------------------------
 227:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** u32 uart0_CountRxOverflow (void) {
 482              		.loc 1 227 0
 483              		.cfi_startproc
 484              		@ args = 0, pretend = 0, frame = 0
 485              		@ frame_needed = 0, uses_anonymous_args = 0
 486              		@ link register save eliminated.
 228:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	u32 count = u0_overflow_rx;
 487              		.loc 1 228 0
 488 0000 024B     		ldr	r3, .L23
 229:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	u0_overflow_rx = 0;
 489              		.loc 1 229 0
 490 0002 0022     		movs	r2, #0
 228:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	u32 count = u0_overflow_rx;
 491              		.loc 1 228 0
 492 0004 1888     		ldrh	r0, [r3]
 493              	.LVL41:
 494              		.loc 1 229 0
 495 0006 1A80     		strh	r2, [r3]	@ movhi
 230:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	return count;
 231:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** }
 496              		.loc 1 231 0
 497 0008 80B2     		uxth	r0, r0
 498              	.LVL42:
 499 000a 7047     		bx	lr
 500              	.L24:
 501              		.align	2
 502              	.L23:
 503 000c 00000000 		.word	.LANCHOR4
 504              		.cfi_endproc
 505              	.LFE6:
 507              		.section	.text.uart0_BufferRxIsEmpty,"ax",%progbits
 508              		.align	1
 509              		.global	uart0_BufferRxIsEmpty
 510              		.thumb
 511              		.thumb_func
 513              	uart0_BufferRxIsEmpty:
 514              	.LFB7:
 232:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 233:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // ------------------------------------------------------------------------------------------------
 234:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Descrição: 	Checa se buffer de recepção está vazio
 235:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Parametros:	Nenhum
 236:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Retorna:		pdTRUE se o buffer estiver vazio
 237:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //				pdFALSE se o buffer contiver dados recebidos
 238:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // ------------------------------------------------------------------------------------------------
 239:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** int uart0_BufferRxIsEmpty(void) {
 515              		.loc 1 239 0
 516              		.cfi_startproc
 517              		@ args = 0, pretend = 0, frame = 0
 518              		@ frame_needed = 0, uses_anonymous_args = 0
 519              		@ link register save eliminated.
 240:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	if (u0_buf_rx.datalength == 0)
 520              		.loc 1 240 0
 521 0000 034B     		ldr	r3, .L26
 522 0002 D888     		ldrh	r0, [r3, #6]
 523 0004 80B2     		uxth	r0, r0
 241:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 			return pdTRUE;
 242:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	else	return pdFALSE;
 243:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** }
 524              		.loc 1 243 0
 525 0006 B0FA80F0 		clz	r0, r0
 526 000a 4009     		lsrs	r0, r0, #5
 527 000c 7047     		bx	lr
 528              	.L27:
 529 000e 00BF     		.align	2
 530              	.L26:
 531 0010 00000000 		.word	.LANCHOR1
 532              		.cfi_endproc
 533              	.LFE7:
 535              		.section	.text.uart0_BufferQtdRx,"ax",%progbits
 536              		.align	1
 537              		.global	uart0_BufferQtdRx
 538              		.thumb
 539              		.thumb_func
 541              	uart0_BufferQtdRx:
 542              	.LFB8:
 244:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 245:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // ------------------------------------------------------------------------------------------------
 246:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Descrição: 	Retorna com a quantidade de bytes recebidos no buffer de recepção
 247:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Parametros:	Nenhum
 248:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Retorna:		Retorna com a quantidade de bytes recebidos no buffer de recepção
 249:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // ------------------------------------------------------------------------------------------------
 250:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** int uart0_BufferQtdRx(void) {
 543              		.loc 1 250 0
 544              		.cfi_startproc
 545              		@ args = 0, pretend = 0, frame = 0
 546              		@ frame_needed = 0, uses_anonymous_args = 0
 547              		@ link register save eliminated.
 251:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	return u0_buf_rx.datalength;
 548              		.loc 1 251 0
 549 0000 014B     		ldr	r3, .L29
 550 0002 D888     		ldrh	r0, [r3, #6]
 252:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** }
 551              		.loc 1 252 0
 552 0004 80B2     		uxth	r0, r0
 553 0006 7047     		bx	lr
 554              	.L30:
 555              		.align	2
 556              	.L29:
 557 0008 00000000 		.word	.LANCHOR1
 558              		.cfi_endproc
 559              	.LFE8:
 561              		.section	.text.uart0_GetBufferRx,"ax",%progbits
 562              		.align	1
 563              		.global	uart0_GetBufferRx
 564              		.thumb
 565              		.thumb_func
 567              	uart0_GetBufferRx:
 568              	.LFB9:
 253:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 254:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // ------------------------------------------------------------------------------------------------
 255:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Descrição: 	Retorna o ponteiro do buffer de recepção de dados
 256:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Parametros:	Nenhum
 257:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Retorna:		Retorna o ponteiro da estrutura do buffer de recepção
 258:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // ------------------------------------------------------------------------------------------------
 259:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** buffer_t *uart0_GetBufferRx(void) {
 569              		.loc 1 259 0
 570              		.cfi_startproc
 571              		@ args = 0, pretend = 0, frame = 0
 572              		@ frame_needed = 0, uses_anonymous_args = 0
 573              		@ link register save eliminated.
 260:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	return &u0_buf_rx;
 261:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** }
 574              		.loc 1 261 0
 575 0000 0048     		ldr	r0, .L32
 576 0002 7047     		bx	lr
 577              	.L33:
 578              		.align	2
 579              	.L32:
 580 0004 00000000 		.word	.LANCHOR1
 581              		.cfi_endproc
 582              	.LFE9:
 584              		.section	.text.uart0_PutChar,"ax",%progbits
 585              		.align	1
 586              		.global	uart0_PutChar
 587              		.thumb
 588              		.thumb_func
 590              	uart0_PutChar:
 591              	.LFB10:
 262:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 263:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //#################################################################################################
 264:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // UART TRANSMISSAO
 265:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //#################################################################################################
 266:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //#################################################################################################
 267:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 268:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // ------------------------------------------------------------------------------------------------
 269:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Descrição:	Coloca um caractere na fila de transmissão
 270:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Parametros: 	Caractere a ser transmitindo
 271:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Retorna:		Retorna pdPASS ou o código de erro
 272:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // ------------------------------------------------------------------------------------------------
 273:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** int uart0_PutChar(n16 ch) {
 592              		.loc 1 273 0
 593              		.cfi_startproc
 594              		@ args = 0, pretend = 0, frame = 0
 595              		@ frame_needed = 0, uses_anonymous_args = 0
 596              	.LVL43:
 274:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	int sts;
 275:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 276:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	if ( u0_buf_tx.size == 0 )												// Checa se o buffer de transmissão ainda não foi criado
 597              		.loc 1 276 0
 598 0000 154B     		ldr	r3, .L42
 273:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	int sts;
 599              		.loc 1 273 0
 600 0002 70B5     		push	{r4, r5, r6, lr}
 601              	.LCFI5:
 602              		.cfi_def_cfa_offset 16
 603              		.cfi_offset 4, -16
 604              		.cfi_offset 5, -12
 605              		.cfi_offset 6, -8
 606              		.cfi_offset 14, -4
 607              		.loc 1 276 0
 608 0004 9B88     		ldrh	r3, [r3, #4]
 609 0006 9BB2     		uxth	r3, r3
 610 0008 03B3     		cbz	r3, .L37
 277:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****    		return errBUFFER_NO_EXIST;                          				// Retorna indicando erro
 278:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 279:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	// É obrigatório incluirmos o char no buffer, mesmo que vamos retirá-lo logo em seguida caso u3_tx
 280:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	//	Se não for dessa forma o e usar U3THR = ch haverá erro de sincronismo entre os dados chegas e d
 281:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	// Isto porque o manipulador de interrupção (uart3_ISR) pode atender a mais de uma interrupção sim
 282:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 283:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	do {
 284:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 		U0IER &= ~U0IER_ETBEI;                 								// Desabilita a interrupção de transmissão
 611              		.loc 1 284 0
 612 000a 144C     		ldr	r4, .L42+4
 285:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 		nop();
 286:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 		sts = buffer_AddToEnd(&u0_buf_tx, ch);
 613              		.loc 1 286 0
 614 000c C5B2     		uxtb	r5, r0
 615              	.LVL44:
 616              	.L40:
 284:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 		nop();
 617              		.loc 1 284 0
 618 000e 2368     		ldr	r3, [r4]
 619 0010 124E     		ldr	r6, .L42+4
 620 0012 23F00203 		bic	r3, r3, #2
 621 0016 2360     		str	r3, [r4]
 285:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 		nop();
 622              		.loc 1 285 0
 623              		.syntax unified
 624              	@ 285 "uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c" 1
 625 0018 00BF     		nop
 626              	@ 0 "" 2
 627              		.loc 1 286 0
 628              		.thumb
 629              		.syntax unified
 630 001a 0F48     		ldr	r0, .L42
 631 001c 2946     		mov	r1, r5
 632 001e FFF7FEFF 		bl	buffer_AddToEnd
 633              	.LVL45:
 287:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 		U0IER |= U0IER_ETBEI;                  								// Habilita a interrupção de transmissão
 634              		.loc 1 287 0
 635 0022 2368     		ldr	r3, [r4]
 288:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 289:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 		CRITICAL_WAIT;														// Caso exista algum OS, pode trocar de contexto
 290:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	} while (sts == errBUFFER_FULL);
 636              		.loc 1 290 0
 637 0024 0A30     		adds	r0, r0, #10
 638              	.LVL46:
 287:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 		U0IER |= U0IER_ETBEI;                  								// Habilita a interrupção de transmissão
 639              		.loc 1 287 0
 640 0026 43F00203 		orr	r3, r3, #2
 641 002a 2360     		str	r3, [r4]
 642              		.loc 1 290 0
 643 002c EFD0     		beq	.L40
 291:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 292:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	if (!u0_tx_running) {													// Checa se existe dado sendo transmitido
 644              		.loc 1 292 0
 645 002e 0C4C     		ldr	r4, .L42+8
 646 0030 2378     		ldrb	r3, [r4]	@ zero_extendqisi2
 647 0032 73B9     		cbnz	r3, .L38
 648              	.LVL47:
 649              	.LBB20:
 650              	.LBB21:
 293:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   		U0THR = buffer_GetFromFront(&u0_buf_tx);							// Atribui o dado do buffer ao registrador de tr
 651              		.loc 1 293 0
 652 0034 0848     		ldr	r0, .L42
 653              	.LVL48:
 654 0036 FFF7FEFF 		bl	buffer_GetFromFront
 655              	.LVL49:
 656 003a 0A4B     		ldr	r3, .L42+12
 657 003c 1860     		str	r0, [r3]
 294:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   		u0_tx_running = pdTRUE;												// Sinaliza que existe dado sendo trasnmitido
 658              		.loc 1 294 0
 659 003e 0120     		movs	r0, #1
 660 0040 2070     		strb	r0, [r4]
 295:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   		U0IER |= U0IER_ETBEI;                  								// Habilita a interrupção de transmissão
 661              		.loc 1 295 0
 662 0042 3368     		ldr	r3, [r6]
 663 0044 43F00203 		orr	r3, r3, #2
 664 0048 3360     		str	r3, [r6]
 665 004a 70BD     		pop	{r4, r5, r6, pc}
 666              	.LVL50:
 667              	.L37:
 668              	.LBE21:
 669              	.LBE20:
 277:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 670              		.loc 1 277 0
 671 004c 6FF00B00 		mvn	r0, #11
 672              	.LVL51:
 673 0050 70BD     		pop	{r4, r5, r6, pc}
 674              	.LVL52:
 675              	.L38:
 296:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****    	}
 297:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 298:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	return pdPASS;
 676              		.loc 1 298 0
 677 0052 0120     		movs	r0, #1
 678              	.LVL53:
 299:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** }
 679              		.loc 1 299 0
 680 0054 70BD     		pop	{r4, r5, r6, pc}
 681              	.L43:
 682 0056 00BF     		.align	2
 683              	.L42:
 684 0058 00000000 		.word	.LANCHOR3
 685 005c 04C00040 		.word	1073790980
 686 0060 00000000 		.word	.LANCHOR5
 687 0064 00C00040 		.word	1073790976
 688              		.cfi_endproc
 689              	.LFE10:
 691              		.section	.text.uart0_BasicPutChar,"ax",%progbits
 692              		.align	1
 693              		.global	uart0_BasicPutChar
 694              		.thumb
 695              		.thumb_func
 697              	uart0_BasicPutChar:
 698              	.LFB11:
 300:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 301:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // ------------------------------------------------------------------------------------------------
 302:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Descrição:	Coloca um caractere na fila de transmissão. FUNÇÃO UTIL PARA DEBUG ONDE NÃO PRECISA I
 303:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Parametros: 	Caractere a ser transmitindo
 304:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Retorna:		Retorna pdPASS ou o código de erro
 305:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // ------------------------------------------------------------------------------------------------
 306:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** int uart0_BasicPutChar(n16 ch) {
 699              		.loc 1 306 0
 700              		.cfi_startproc
 701              		@ args = 0, pretend = 0, frame = 0
 702              		@ frame_needed = 0, uses_anonymous_args = 0
 703              		@ link register save eliminated.
 704              	.LVL54:
 307:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	while (!(U0LSR & U0LSR_THRE))								// Espero até que o buffer TX fique vazio
 705              		.loc 1 307 0
 706 0000 044A     		ldr	r2, .L48
 707              	.L45:
 708 0002 1368     		ldr	r3, [r2]
 709 0004 9B06     		lsls	r3, r3, #26
 710 0006 FCD5     		bpl	.L45
 308:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   		CRITICAL_WAIT;        									// Caso exista algum OS, pode trocar de contexto
 309:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	U0THR = (u8)ch;												// Atualiza o registrador de TX uart com o dado
 711              		.loc 1 309 0
 712 0008 034B     		ldr	r3, .L48+4
 713 000a C0B2     		uxtb	r0, r0
 714              	.LVL55:
 715 000c 1860     		str	r0, [r3]
 310:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	return pdPASS;
 311:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** }
 716              		.loc 1 311 0
 717 000e 0120     		movs	r0, #1
 718 0010 7047     		bx	lr
 719              	.L49:
 720 0012 00BF     		.align	2
 721              	.L48:
 722 0014 14C00040 		.word	1073790996
 723 0018 00C00040 		.word	1073790976
 724              		.cfi_endproc
 725              	.LFE11:
 727              		.section	.text.uart0_SpaceTx,"ax",%progbits
 728              		.align	1
 729              		.global	uart0_SpaceTx
 730              		.thumb
 731              		.thumb_func
 733              	uart0_SpaceTx:
 734              	.LFB12:
 312:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 313:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // ------------------------------------------------------------------------------------------------
 314:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Descrição:	Captura o espaço disponivel para transmissão
 315:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Parametros: 	Nenhum
 316:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Retorna:		O tamanho em bytes do espaço disponivel para transmissão
 317:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // ------------------------------------------------------------------------------------------------
 318:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** u16 uart0_SpaceTx(void) {
 735              		.loc 1 318 0
 736              		.cfi_startproc
 737              		@ args = 0, pretend = 0, frame = 0
 738              		@ frame_needed = 0, uses_anonymous_args = 0
 739              		@ link register save eliminated.
 319:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	u16 qtd;
 320:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	
 321:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	U0IER &= ~U0IER_ETBEI;                 								// Desativa a interrupção de transmissão
 740              		.loc 1 321 0
 741 0000 074B     		ldr	r3, .L51
 742 0002 1A68     		ldr	r2, [r3]
 743 0004 22F00202 		bic	r2, r2, #2
 744 0008 1A60     		str	r2, [r3]
 322:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	nop();
 745              		.loc 1 322 0
 746              		.syntax unified
 747              	@ 322 "uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c" 1
 748 000a 00BF     		nop
 749              	@ 0 "" 2
 323:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	qtd = (u16)(u0_buf_tx.size - u0_buf_tx.datalength);					// Retorna com o espaço disponivel
 750              		.loc 1 323 0
 751              		.thumb
 752              		.syntax unified
 753 000c 0549     		ldr	r1, .L51+4
 754 000e 8A88     		ldrh	r2, [r1, #4]
 755 0010 C888     		ldrh	r0, [r1, #6]
 756              	.LVL56:
 324:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	U0IER |= U0IER_ETBEI;                  								// Habilita a interrupção de transmissão
 757              		.loc 1 324 0
 758 0012 1968     		ldr	r1, [r3]
 325:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	return qtd;
 759              		.loc 1 325 0
 760 0014 101A     		subs	r0, r2, r0
 761              	.LVL57:
 324:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	U0IER |= U0IER_ETBEI;                  								// Habilita a interrupção de transmissão
 762              		.loc 1 324 0
 763 0016 41F00201 		orr	r1, r1, #2
 764 001a 1960     		str	r1, [r3]
 326:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** }
 765              		.loc 1 326 0
 766 001c 80B2     		uxth	r0, r0
 767 001e 7047     		bx	lr
 768              	.L52:
 769              		.align	2
 770              	.L51:
 771 0020 04C00040 		.word	1073790980
 772 0024 00000000 		.word	.LANCHOR3
 773              		.cfi_endproc
 774              	.LFE12:
 776              		.section	.text.uart0_FlushTx,"ax",%progbits
 777              		.align	1
 778              		.global	uart0_FlushTx
 779              		.thumb
 780              		.thumb_func
 782              	uart0_FlushTx:
 783              	.LFB13:
 327:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 328:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // ------------------------------------------------------------------------------------------------
 329:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Descrição:	Remove todos os dados da fila de transmissão
 330:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Parametros: 	Nenhum
 331:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Retorna:		Nada
 332:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // ------------------------------------------------------------------------------------------------
 333:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** void uart0_FlushTx(void) {	
 784              		.loc 1 333 0
 785              		.cfi_startproc
 786              		@ args = 0, pretend = 0, frame = 0
 787              		@ frame_needed = 0, uses_anonymous_args = 0
 788              		@ link register save eliminated.
 334:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	U0IER &= ~U0IER_ETBEI;                					// Desabilita a interrupção de transmissão
 789              		.loc 1 334 0
 790 0000 054A     		ldr	r2, .L54
 791 0002 1368     		ldr	r3, [r2]
 792 0004 23F00203 		bic	r3, r3, #2
 793 0008 1360     		str	r3, [r2]
 335:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	nop();
 794              		.loc 1 335 0
 795              		.syntax unified
 796              	@ 335 "uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c" 1
 797 000a 00BF     		nop
 798              	@ 0 "" 2
 336:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	U0FCR = U0FCR_TX_FIFO_RESET;          					// Limpa a FIFO de transmissão
 799              		.loc 1 336 0
 800              		.thumb
 801              		.syntax unified
 802 000c 034B     		ldr	r3, .L54+4
 803 000e 0422     		movs	r2, #4
 804 0010 1A60     		str	r2, [r3]
 337:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	buffer_Clear(&u0_buf_tx);								// Limpa os indeces do buffer TX da UART
 805              		.loc 1 337 0
 806 0012 0348     		ldr	r0, .L54+8
 807 0014 FFF7FEBF 		b	buffer_Clear
 808              	.LVL58:
 809              	.L55:
 810              		.align	2
 811              	.L54:
 812 0018 04C00040 		.word	1073790980
 813 001c 08C00040 		.word	1073790984
 814 0020 00000000 		.word	.LANCHOR3
 815              		.cfi_endproc
 816              	.LFE13:
 818              		.section	.text.uart0_EmptyTx,"ax",%progbits
 819              		.align	1
 820              		.global	uart0_EmptyTx
 821              		.thumb
 822              		.thumb_func
 824              	uart0_EmptyTx:
 825              	.LFB14:
 338:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** }
 339:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 340:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // ------------------------------------------------------------------------------------------------
 341:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Descrição:	Retorna o status do registrador de transmissão de dados
 342:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Parametros: 	Nenhum
 343:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Retorna:		pdFALSE = Se o registradores U0THR ou U0TSR não estão vazios
 344:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //				pdTRUE = Se o registradores U0THR ou U0TSR estão vazios
 345:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // ------------------------------------------------------------------------------------------------
 346:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** int uart0_EmptyTx(void) {
 826              		.loc 1 346 0
 827              		.cfi_startproc
 828              		@ args = 0, pretend = 0, frame = 0
 829              		@ frame_needed = 0, uses_anonymous_args = 0
 830              		@ link register save eliminated.
 347:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	if ((U0LSR & (U0LSR_THRE | U0LSR_TEMT)) == (U0LSR_THRE | U0LSR_TEMT))
 831              		.loc 1 347 0
 832 0000 044B     		ldr	r3, .L57
 833 0002 1868     		ldr	r0, [r3]
 834 0004 00F06000 		and	r0, r0, #96
 348:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   			return pdTRUE;
 349:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	else	return pdFALSE;  		
 350:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** }
 835              		.loc 1 350 0
 836 0008 A0F16003 		sub	r3, r0, #96
 837 000c 5842     		rsbs	r0, r3, #0
 838 000e 5841     		adcs	r0, r0, r3
 839 0010 7047     		bx	lr
 840              	.L58:
 841 0012 00BF     		.align	2
 842              	.L57:
 843 0014 14C00040 		.word	1073790996
 844              		.cfi_endproc
 845              	.LFE14:
 847              		.section	.text.uart0_WriteTx,"ax",%progbits
 848              		.align	1
 849              		.global	uart0_WriteTx
 850              		.thumb
 851              		.thumb_func
 853              	uart0_WriteTx:
 854              	.LFB15:
 351:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 352:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** #if !defined(FREE_RTOS)
 353:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // ------------------------------------------------------------------------------------------------
 354:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Descrição:	Adiociona N caracteres no buffer de transmissão
 355:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Parametros: 	Ponteiro do buffer 
 356:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //				Quantidade de caracteres as serem transmitidos
 357:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Retorna:		pdPASS = Transmitido com sucesso ou o código do erro
 358:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // ------------------------------------------------------------------------------------------------
 359:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** int uart0_WriteTx(u8 *buffer, u16 count) {
 855              		.loc 1 359 0
 856              		.cfi_startproc
 857              		@ args = 0, pretend = 0, frame = 0
 858              		@ frame_needed = 0, uses_anonymous_args = 0
 859              	.LVL59:
 860 0000 38B5     		push	{r3, r4, r5, lr}
 861              	.LCFI6:
 862              		.cfi_def_cfa_offset 16
 863              		.cfi_offset 3, -16
 864              		.cfi_offset 4, -12
 865              		.cfi_offset 5, -8
 866              		.cfi_offset 14, -4
 867              		.loc 1 359 0
 868 0002 0C46     		mov	r4, r1
 869 0004 0546     		mov	r5, r0
 360:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	if (count > uart0_SpaceTx())									// Checa se exste espaço suficiente no buffer de TX de espaço
 870              		.loc 1 360 0
 871 0006 FFF7FEFF 		bl	uart0_SpaceTx
 872              	.LVL60:
 873 000a A042     		cmp	r0, r4
 874 000c 0AD2     		bcs	.L61
 875              	.LVL61:
 876              	.L60:
 361:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****    		return errBUFFER_FULL;										// Retorna cheio
 877              		.loc 1 361 0
 878 000e 6FF00900 		mvn	r0, #9
 879 0012 38BD     		pop	{r3, r4, r5, pc}
 880              	.LVL62:
 881              	.L65:
 362:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	
 363:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	while (count && (uart0_PutChar(*buffer++) >= 0))				// Faça enquanto tem dados a serem transmiti
 882              		.loc 1 363 0 discriminator 1
 883 0014 15F8010B 		ldrb	r0, [r5], #1	@ zero_extendqisi2
 884              	.LVL63:
 885 0018 FFF7FEFF 		bl	uart0_PutChar
 886              	.LVL64:
 887 001c 0028     		cmp	r0, #0
 888 001e F6DB     		blt	.L60
 364:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****     	count--;
 889              		.loc 1 364 0
 890 0020 013C     		subs	r4, r4, #1
 891              	.LVL65:
 892 0022 A4B2     		uxth	r4, r4
 893              	.LVL66:
 894              	.L61:
 363:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****     	count--;
 895              		.loc 1 363 0
 896 0024 002C     		cmp	r4, #0
 897 0026 F5D1     		bne	.L65
 365:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 366:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	return (count ? errBUFFER_FULL : pdPASS);						// Se count = 0 retorna 0 (Sucesso) senão retorna
 898              		.loc 1 366 0
 899 0028 0120     		movs	r0, #1
 367:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** }
 900              		.loc 1 367 0
 901 002a 38BD     		pop	{r3, r4, r5, pc}
 902              		.cfi_endproc
 903              	.LFE15:
 905              		.section	.text.uart0_PutString,"ax",%progbits
 906              		.align	1
 907              		.global	uart0_PutString
 908              		.thumb
 909              		.thumb_func
 911              	uart0_PutString:
 912              	.LFB16:
 368:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 369:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // ------------------------------------------------------------------------------------------------
 370:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Descrição:	Transmite uma string até que encontre o caractere NULO '\0' ou que o buffer estoura
 371:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //				ATENÇÂO: o Compilador já adiciona \0 na string do tipo "xyz" EX: "\r\r\nHello World!\r\r\n" 
 372:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Parametros: 	Ponteiro da string
 373:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // Retorna:		O ponteiro da string. 
 374:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //					Retorna NULO se a string foi completamente transmitindo 
 375:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //					Ou retorna o ponteiro do próximo caractere a ser transmitido
 376:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // OBS: Se a string for maior que o espaço disponivel no buffer de TX pode ocorrer que a string não
 377:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // ------------------------------------------------------------------------------------------------
 378:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** u8 *uart0_PutString(u8 *str) {
 913              		.loc 1 378 0
 914              		.cfi_startproc
 915              		@ args = 0, pretend = 0, frame = 0
 916              		@ frame_needed = 0, uses_anonymous_args = 0
 917              	.LVL67:
 918 0000 38B5     		push	{r3, r4, r5, lr}
 919              	.LCFI7:
 920              		.cfi_def_cfa_offset 16
 921              		.cfi_offset 3, -16
 922              		.cfi_offset 4, -12
 923              		.cfi_offset 5, -8
 924              		.cfi_offset 14, -4
 925 0002 0446     		mov	r4, r0
 926              	.LVL68:
 927              	.L68:
 928 0004 2546     		mov	r5, r4
 929              	.LVL69:
 379:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	register char ch;
 380:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 381:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	while ((ch = *str) && (uart0_PutChar(ch) >= 0))				// Adiciona para transmissão enquanto tenha dad
 930              		.loc 1 381 0
 931 0006 14F8010B 		ldrb	r0, [r4], #1	@ zero_extendqisi2
 932              	.LVL70:
 933 000a 18B1     		cbz	r0, .L71
 934              		.loc 1 381 0 is_stmt 0 discriminator 1
 935 000c FFF7FEFF 		bl	uart0_PutChar
 936              	.LVL71:
 937 0010 0028     		cmp	r0, #0
 938 0012 F7DA     		bge	.L68
 939              	.L71:
 382:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****     	str++;
 383:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 384:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	return str;													// Retorna o ponteiro atual da string
 385:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** }
 940              		.loc 1 385 0 is_stmt 1
 941 0014 2846     		mov	r0, r5
 942 0016 38BD     		pop	{r3, r4, r5, pc}
 943              		.cfi_endproc
 944              	.LFE16:
 946              		.section	.text.uart0_ISR,"ax",%progbits
 947              		.align	1
 948              		.global	uart0_ISR
 949              		.thumb
 950              		.thumb_func
 952              	uart0_ISR:
 953              	.LFB17:
 386:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** #endif // FREE_RTOS
 387:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 388:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //#################################################################################################
 389:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // UART SERVIÇO DE INTERRUPÇÕES
 390:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** // 		Descrição: 	Esta função implementa o ISR da UART0
 391:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //#################################################################################################
 392:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** //#################################################################################################
 393:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** void uart0_ISR (void) {
 954              		.loc 1 393 0
 955              		.cfi_startproc
 956              		@ args = 0, pretend = 0, frame = 0
 957              		@ frame_needed = 0, uses_anonymous_args = 0
 958 0000 2DE9F041 		push	{r4, r5, r6, r7, r8, lr}
 959              	.LCFI8:
 960              		.cfi_def_cfa_offset 24
 961              		.cfi_offset 4, -24
 962              		.cfi_offset 5, -20
 963              		.cfi_offset 6, -16
 964              		.cfi_offset 7, -12
 965              		.cfi_offset 8, -8
 966              		.cfi_offset 14, -4
 394:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	ISR_ENTRY;																// Procedimento para entrada da interrupção
 395:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 396:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	u8 int_flags;
 397:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****  	 	
 398:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	while ( !((int_flags = U0IIR) & U0IIR_NO_INT) ) {							// Faça para todos os pedidos de interru
 967              		.loc 1 398 0
 968 0004 234E     		ldr	r6, .L89
 969 0006 244C     		ldr	r4, .L89+4
 399:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****     	switch (int_flags & U0IIR_ID_MASK) {									// Identifica a fonte de interrupção
 400:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****       	case U0IIR_RLS_INT:                									// Caso recebeu uma INT de erro na linha de rece
 401:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****         	U0LSR;                          								// Limpa registrador de status de linha
 402:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****         	break;
 403:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 404:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****         // ADICIONA NO BUFFER RX OS DADOS DA FIFO
 405:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****         // No modo de trigger acima de 1 byte, se a quantidade de bytes da FIFO de recepção
 406:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****         	// não alcançar o nível do trigger os dados da FIFO serão adicionados
 407:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****         	// ao buffer de recepção pela interrupção de timerout da UART (U3IIR_CTI_INT)
 408:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****       	case U0IIR_CTI_INT:                									// Character Timeout Indicator. Dados na FIFO RX
 409:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****       	case U0IIR_RDA_INT:                									// Caso que exista bytes disponivel recepção
 410:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****       		do { 
 411:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****       			if (buffer_AddToEnd(&u0_buf_rx, U0RBR) == errBUFFER_FULL)
 412:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 					u0_overflow_rx++;
 413:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****       		} while(U0LSR & U0LSR_RDR);										// Faça enquanto existe dados validos na FIFO de recep
 414:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 415:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 			#if (UART0_USE_HANDSHAKING == pdON) // AINDA NÃO TESTADO
 416:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****      		if (UART0_RX_BUFFER_SIZE - u0_buf_rx.datalength > UART0_SIZE_FIFO)
 417:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****      			 uart0_RTSon(); // Sinaliza que posso receber mais dados
 418:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****      		else uart0_RTSoff(); // Sinaliza que não posso receber mais dados
 419:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   			#endif
 420:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 421:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 			break;
 422:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 423:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****      	// RETIRA OS DADOS DO BUFFER TX PARA A FIFO DE TRANSMISSÃO
 424:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****      		// Essa interrupção é gerada quando a FIFO de transmissão de 16 bytes está vazia
 425:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 			// O registrador UxTHR é o topo da FIFO de 16 bytes, ou seja, é o endereço da última posição a s
 426:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****       	case U0IIR_THRE_INT:               									// Interrupção da FIFO de 16 bytes quando está v
 427:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****         	while (U0LSR & U0LSR_THRE) {									// Faça enquanto há espaço na FIFO
 428:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****         		if (buffer_IsEmpty(&u0_buf_tx) ) {							// Checa se o buffer de transmissão já está vazi
 429:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****         			u0_tx_running = pdFALSE;     							// Sinaliza que não existe dados para trasnmissao
 430:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****         			U0IER &= ~U0IER_ETBEI;                					// Desativa a interrupção de transmissão
 970              		.loc 1 430 0
 971 0008 244D     		ldr	r5, .L89+8
 972              	.L73:
 398:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****     	switch (int_flags & U0IIR_ID_MASK) {									// Identifica a fonte de interrupção
 973              		.loc 1 398 0
 974 000a 3368     		ldr	r3, [r6]
 975              	.LVL72:
 976 000c DBB2     		uxtb	r3, r3
 977 000e DA07     		lsls	r2, r3, #31
 978 0010 3AD4     		bmi	.L88
 399:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****     	switch (int_flags & U0IIR_ID_MASK) {									// Identifica a fonte de interrupção
 979              		.loc 1 399 0
 980 0012 03F00E03 		and	r3, r3, #14
 981              	.LVL73:
 982 0016 023B     		subs	r3, r3, #2
 983 0018 0A2B     		cmp	r3, #10
 984 001a 31D8     		bhi	.L74
 985 001c DFE803F0 		tbb	[pc, r3]
 986              	.L76:
 987 0020 1B       		.byte	(.L75-.L76)/2
 988 0021 30       		.byte	(.L74-.L76)/2
 989 0022 08       		.byte	(.L77-.L76)/2
 990 0023 30       		.byte	(.L74-.L76)/2
 991 0024 06       		.byte	(.L78-.L76)/2
 992 0025 30       		.byte	(.L74-.L76)/2
 993 0026 30       		.byte	(.L74-.L76)/2
 994 0027 30       		.byte	(.L74-.L76)/2
 995 0028 30       		.byte	(.L74-.L76)/2
 996 0029 30       		.byte	(.L74-.L76)/2
 997 002a 08       		.byte	(.L77-.L76)/2
 998 002b 00       		.p2align 1
 999              	.L78:
 401:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****         	break;
 1000              		.loc 1 401 0
 1001 002c 2368     		ldr	r3, [r4]
 402:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 1002              		.loc 1 402 0
 1003 002e ECE7     		b	.L73
 1004              	.L77:
 411:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 					u0_overflow_rx++;
 1005              		.loc 1 411 0
 1006 0030 DFF87480 		ldr	r8, .L89+20
 412:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****       		} while(U0LSR & U0LSR_RDR);										// Faça enquanto existe dados validos na FIFO de recep
 1007              		.loc 1 412 0
 1008 0034 1A4F     		ldr	r7, .L89+12
 1009              	.L85:
 411:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 					u0_overflow_rx++;
 1010              		.loc 1 411 0
 1011 0036 D8F80010 		ldr	r1, [r8]
 1012 003a 1A48     		ldr	r0, .L89+16
 1013 003c C9B2     		uxtb	r1, r1
 1014 003e FFF7FEFF 		bl	buffer_AddToEnd
 1015              	.LVL74:
 1016 0042 0A30     		adds	r0, r0, #10
 412:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****       		} while(U0LSR & U0LSR_RDR);										// Faça enquanto existe dados validos na FIFO de recep
 1017              		.loc 1 412 0
 1018 0044 01BF     		itttt	eq
 1019 0046 3B88     		ldrheq	r3, [r7]
 1020 0048 0133     		addeq	r3, r3, #1
 1021 004a 9BB2     		uxtheq	r3, r3
 1022 004c 3B80     		strheq	r3, [r7]	@ movhi
 413:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 1023              		.loc 1 413 0
 1024 004e 2368     		ldr	r3, [r4]
 1025 0050 D807     		lsls	r0, r3, #31
 1026 0052 F0D4     		bmi	.L85
 1027 0054 D9E7     		b	.L73
 1028              	.L75:
 431:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****             		break;
 432:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****           		} else {
 433:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 					#if (UART0_USE_HANDSHAKING == pdON) // AINDA NÃO TESTADO
 434:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	    			if (uart0_CTS()) // Checa se o receptor esteja pronto para eviar dados
 435:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 					#endif
 436:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	          			U0THR = buffer_GetFromFront(&u0_buf_tx);			// Atribui o dado do buffer ao registrador
 1029              		.loc 1 436 0
 1030 0056 144F     		ldr	r7, .L89+20
 1031              	.L87:
 427:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****         		if (buffer_IsEmpty(&u0_buf_tx) ) {							// Checa se o buffer de transmissão já está vazi
 1032              		.loc 1 427 0
 1033 0058 2368     		ldr	r3, [r4]
 1034 005a 9906     		lsls	r1, r3, #26
 1035 005c D5D5     		bpl	.L73
 428:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****         			u0_tx_running = pdFALSE;     							// Sinaliza que não existe dados para trasnmissao
 1036              		.loc 1 428 0
 1037 005e 1348     		ldr	r0, .L89+24
 1038 0060 FFF7FEFF 		bl	buffer_IsEmpty
 1039              	.LVL75:
 1040 0064 38B1     		cbz	r0, .L81
 429:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****         			U0IER &= ~U0IER_ETBEI;                					// Desativa a interrupção de transmissão
 1041              		.loc 1 429 0
 1042 0066 124B     		ldr	r3, .L89+28
 1043 0068 0022     		movs	r2, #0
 1044 006a 1A70     		strb	r2, [r3]
 430:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****             		break;
 1045              		.loc 1 430 0
 1046 006c 2B68     		ldr	r3, [r5]
 1047 006e 23F00203 		bic	r3, r3, #2
 1048 0072 2B60     		str	r3, [r5]
 431:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****           		} else {
 1049              		.loc 1 431 0
 1050 0074 C9E7     		b	.L73
 1051              	.L81:
 1052              		.loc 1 436 0
 1053 0076 0D48     		ldr	r0, .L89+24
 1054 0078 FFF7FEFF 		bl	buffer_GetFromFront
 1055              	.LVL76:
 1056 007c 3860     		str	r0, [r7]
 1057 007e EBE7     		b	.L87
 1058              	.L74:
 437:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	          	}
 438:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****           	}
 439:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 		    
 440:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 		    break;
 441:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 442:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****       	default:															// Interrupção desconhecida
 443:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****         	U0LSR;															// Limpa registrador de status de linha
 1059              		.loc 1 443 0
 1060 0080 2368     		ldr	r3, [r4]
 444:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****         	U0RBR;															// Limpa o registrador de recepçao de dados
 1061              		.loc 1 444 0
 1062 0082 094B     		ldr	r3, .L89+20
 1063 0084 1B68     		ldr	r3, [r3]
 445:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	       	break;
 1064              		.loc 1 445 0
 1065 0086 C0E7     		b	.L73
 1066              	.LVL77:
 1067              	.L88:
 446:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****       	}
 447:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	}
 448:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	
 449:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	// Limpa interrupção
 450:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	#if defined(arm7tdmi)
 451:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	VICSoftIntClr = (1<<VIC_UART0);
 452:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	#endif
 453:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	#if defined (cortexm3)
 454:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	nvic_clearPendingIRQ(VIC_UART0);
 1068              		.loc 1 454 0
 1069 0088 0520     		movs	r0, #5
 455:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	#endif
 456:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 
 457:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c ****   	ISR_EXIT;																// Procedimento para saida da interrupção
 458:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** }
 1070              		.loc 1 458 0
 1071 008a BDE8F041 		pop	{r4, r5, r6, r7, r8, lr}
 1072              	.LCFI9:
 1073              		.cfi_restore 14
 1074              		.cfi_restore 8
 1075              		.cfi_restore 7
 1076              		.cfi_restore 6
 1077              		.cfi_restore 5
 1078              		.cfi_restore 4
 1079              		.cfi_def_cfa_offset 0
 454:uc_libc_dev/_arch/arm_lpc/uart/uart0_irq.c **** 	#endif
 1080              		.loc 1 454 0
 1081 008e FFF7FEBF 		b	nvic_clearPendingIRQ
 1082              	.LVL78:
 1083              	.L90:
 1084 0092 00BF     		.align	2
 1085              	.L89:
 1086 0094 08C00040 		.word	1073790984
 1087 0098 14C00040 		.word	1073790996
 1088 009c 04C00040 		.word	1073790980
 1089 00a0 00000000 		.word	.LANCHOR4
 1090 00a4 00000000 		.word	.LANCHOR1
 1091 00a8 00C00040 		.word	1073790976
 1092 00ac 00000000 		.word	.LANCHOR3
 1093 00b0 00000000 		.word	.LANCHOR5
 1094              		.cfi_endproc
 1095              	.LFE17:
 1097              		.section	.bss.u0_data_tx,"aw",%nobits
 1098              		.set	.LANCHOR2,. + 0
 1101              	u0_data_tx:
 1102 0000 00000000 		.space	150
 1102      00000000 
 1102      00000000 
 1102      00000000 
 1102      00000000 
 1103              		.section	.bss.u0_tx_running,"aw",%nobits
 1104              		.set	.LANCHOR5,. + 0
 1107              	u0_tx_running:
 1108 0000 00       		.space	1
 1109              		.section	.bss.u0_overflow_rx,"aw",%nobits
 1110              		.align	1
 1111              		.set	.LANCHOR4,. + 0
 1114              	u0_overflow_rx:
 1115 0000 0000     		.space	2
 1116              		.section	.bss.u0_buf_rx,"aw",%nobits
 1117              		.align	2
 1118              		.set	.LANCHOR1,. + 0
 1121              	u0_buf_rx:
 1122 0000 00000000 		.space	12
 1122      00000000 
 1122      00000000 
 1123              		.section	.bss.u0_buf_tx,"aw",%nobits
 1124              		.align	2
 1125              		.set	.LANCHOR3,. + 0
 1128              	u0_buf_tx:
 1129 0000 00000000 		.space	12
 1129      00000000 
 1129      00000000 
 1130              		.section	.bss.u0_data_rx,"aw",%nobits
 1131              		.set	.LANCHOR0,. + 0
 1134              	u0_data_rx:
 1135 0000 00000000 		.space	150
 1135      00000000 
 1135      00000000 
 1135      00000000 
 1135      00000000 
 1136              		.text
 1137              	.Letext0:
 1138              		.file 2 "uc_libc_dev/_libdef/uc_libdefs.h"
 1139              		.file 3 "uc_libc_dev/misc/buffer.h"
 1140              		.file 4 "uc_libc_dev/_arch/arm_lpc/common/vic_cortexm3.h"
DEFINED SYMBOLS
                            *ABS*:00000000 uart0_irq.c
D:\_temp\_windows\ccSAldfK.s:29     .text.uart0_SetBaudrate:00000000 $t
D:\_temp\_windows\ccSAldfK.s:34     .text.uart0_SetBaudrate:00000000 uart0_SetBaudrate
D:\_temp\_windows\ccSAldfK.s:199    .text.uart0_SetBaudrate:000000c8 $d
D:\_temp\_windows\ccSAldfK.s:212    .text.uart0_Init:00000000 $t
D:\_temp\_windows\ccSAldfK.s:217    .text.uart0_Init:00000000 uart0_Init
D:\_temp\_windows\ccSAldfK.s:326    .text.uart0_Init:00000078 $d
D:\_temp\_windows\ccSAldfK.s:342    .text.uart0_GetChar:00000000 $t
D:\_temp\_windows\ccSAldfK.s:347    .text.uart0_GetChar:00000000 uart0_GetChar
D:\_temp\_windows\ccSAldfK.s:413    .text.uart0_GetChar:0000003c $d
D:\_temp\_windows\ccSAldfK.s:419    .text.uart0_ClearBufferRx:00000000 $t
D:\_temp\_windows\ccSAldfK.s:424    .text.uart0_ClearBufferRx:00000000 uart0_ClearBufferRx
D:\_temp\_windows\ccSAldfK.s:467    .text.uart0_ClearBufferRx:0000002c $d
D:\_temp\_windows\ccSAldfK.s:475    .text.uart0_CountRxOverflow:00000000 $t
D:\_temp\_windows\ccSAldfK.s:480    .text.uart0_CountRxOverflow:00000000 uart0_CountRxOverflow
D:\_temp\_windows\ccSAldfK.s:503    .text.uart0_CountRxOverflow:0000000c $d
D:\_temp\_windows\ccSAldfK.s:508    .text.uart0_BufferRxIsEmpty:00000000 $t
D:\_temp\_windows\ccSAldfK.s:513    .text.uart0_BufferRxIsEmpty:00000000 uart0_BufferRxIsEmpty
D:\_temp\_windows\ccSAldfK.s:531    .text.uart0_BufferRxIsEmpty:00000010 $d
D:\_temp\_windows\ccSAldfK.s:536    .text.uart0_BufferQtdRx:00000000 $t
D:\_temp\_windows\ccSAldfK.s:541    .text.uart0_BufferQtdRx:00000000 uart0_BufferQtdRx
D:\_temp\_windows\ccSAldfK.s:557    .text.uart0_BufferQtdRx:00000008 $d
D:\_temp\_windows\ccSAldfK.s:562    .text.uart0_GetBufferRx:00000000 $t
D:\_temp\_windows\ccSAldfK.s:567    .text.uart0_GetBufferRx:00000000 uart0_GetBufferRx
D:\_temp\_windows\ccSAldfK.s:580    .text.uart0_GetBufferRx:00000004 $d
D:\_temp\_windows\ccSAldfK.s:585    .text.uart0_PutChar:00000000 $t
D:\_temp\_windows\ccSAldfK.s:590    .text.uart0_PutChar:00000000 uart0_PutChar
D:\_temp\_windows\ccSAldfK.s:684    .text.uart0_PutChar:00000058 $d
D:\_temp\_windows\ccSAldfK.s:692    .text.uart0_BasicPutChar:00000000 $t
D:\_temp\_windows\ccSAldfK.s:697    .text.uart0_BasicPutChar:00000000 uart0_BasicPutChar
D:\_temp\_windows\ccSAldfK.s:722    .text.uart0_BasicPutChar:00000014 $d
D:\_temp\_windows\ccSAldfK.s:728    .text.uart0_SpaceTx:00000000 $t
D:\_temp\_windows\ccSAldfK.s:733    .text.uart0_SpaceTx:00000000 uart0_SpaceTx
D:\_temp\_windows\ccSAldfK.s:771    .text.uart0_SpaceTx:00000020 $d
D:\_temp\_windows\ccSAldfK.s:777    .text.uart0_FlushTx:00000000 $t
D:\_temp\_windows\ccSAldfK.s:782    .text.uart0_FlushTx:00000000 uart0_FlushTx
D:\_temp\_windows\ccSAldfK.s:812    .text.uart0_FlushTx:00000018 $d
D:\_temp\_windows\ccSAldfK.s:819    .text.uart0_EmptyTx:00000000 $t
D:\_temp\_windows\ccSAldfK.s:824    .text.uart0_EmptyTx:00000000 uart0_EmptyTx
D:\_temp\_windows\ccSAldfK.s:843    .text.uart0_EmptyTx:00000014 $d
D:\_temp\_windows\ccSAldfK.s:848    .text.uart0_WriteTx:00000000 $t
D:\_temp\_windows\ccSAldfK.s:853    .text.uart0_WriteTx:00000000 uart0_WriteTx
D:\_temp\_windows\ccSAldfK.s:906    .text.uart0_PutString:00000000 $t
D:\_temp\_windows\ccSAldfK.s:911    .text.uart0_PutString:00000000 uart0_PutString
D:\_temp\_windows\ccSAldfK.s:947    .text.uart0_ISR:00000000 $t
D:\_temp\_windows\ccSAldfK.s:952    .text.uart0_ISR:00000000 uart0_ISR
D:\_temp\_windows\ccSAldfK.s:987    .text.uart0_ISR:00000020 $d
D:\_temp\_windows\ccSAldfK.s:1086   .text.uart0_ISR:00000094 $d
D:\_temp\_windows\ccSAldfK.s:1101   .bss.u0_data_tx:00000000 u0_data_tx
D:\_temp\_windows\ccSAldfK.s:1102   .bss.u0_data_tx:00000000 $d
D:\_temp\_windows\ccSAldfK.s:1107   .bss.u0_tx_running:00000000 u0_tx_running
D:\_temp\_windows\ccSAldfK.s:1108   .bss.u0_tx_running:00000000 $d
D:\_temp\_windows\ccSAldfK.s:1110   .bss.u0_overflow_rx:00000000 $d
D:\_temp\_windows\ccSAldfK.s:1114   .bss.u0_overflow_rx:00000000 u0_overflow_rx
D:\_temp\_windows\ccSAldfK.s:1117   .bss.u0_buf_rx:00000000 $d
D:\_temp\_windows\ccSAldfK.s:1121   .bss.u0_buf_rx:00000000 u0_buf_rx
D:\_temp\_windows\ccSAldfK.s:1124   .bss.u0_buf_tx:00000000 $d
D:\_temp\_windows\ccSAldfK.s:1128   .bss.u0_buf_tx:00000000 u0_buf_tx
D:\_temp\_windows\ccSAldfK.s:1134   .bss.u0_data_rx:00000000 u0_data_rx
D:\_temp\_windows\ccSAldfK.s:1135   .bss.u0_data_rx:00000000 $d
                     .debug_frame:00000010 $d
D:\_temp\_windows\ccSAldfK.s:998    .text.uart0_ISR:0000002b $d
D:\_temp\_windows\ccSAldfK.s:998    .text.uart0_ISR:0000002c $t

UNDEFINED SYMBOLS
__aeabi_i2d
__aeabi_dmul
__aeabi_d2iz
__aeabi_i2f
__aeabi_fdiv
__aeabi_fadd
__aeabi_fmul
__aeabi_f2d
__aeabi_ddiv
nvic_enableIRQ
nvic_setPriority
buffer_Init
buffer_GetFromFront
buffer_Clear
buffer_AddToEnd
buffer_IsEmpty
nvic_clearPendingIRQ
